 |
| Multifunction
IBFD phased-array scenarios, highlighting (a) a defense application
where a fighter aircraft can simultaneously communicate, employ radar,
and engage jamming or advanced electronic attack (EA) countermeasures
and (b) a commercial application with a smart base station providing
communications enhanced by object tracking. |
Simultaneous-Multifunction Phased Arrays: Enabled by In-Band Full-Duplex Technology | IEEE Journals & Magazine | IEEE Xplore
Active phased-array systems are gaining popularity in many wireless applications due to their ability to electronically create, steer, and change multiple beams with high directivity as well as adaptively reduce external interference [1] .
Fifth- and next-generation wireless communications are leveraging phased arrays to create smart base stations in sub-6-GHz Frequency Range 1 (FR1) [2] as well as overcoming the propagation losses in the Frequency Range 2 (FR2) millimeter-wave spectrum [3] .
For space-based constellations like Starlink and Kuiper, ground stations utilize phased arrays to simultaneously track multiple satellites using different beams without any mechanical movement [4] .
The stringent link budgets of radar applications have also benefited from the high directivity of phased arrays as well as their angle-of-arrival estimation accuracy without cumbersome and costly servo motors for object detection [5] .
Finally, electronic warfare (EW) systems are beginning to leverage phased arrays to more accurately locate hostile signals in noisy environments and precisely direct their jamming attacks [6] .
Introduction
The investigation into these multifunction RF systems began as the number of antennas on navy ships exploded between the 1980s and 1990s [7]. In hopes of combating this trend, researchers focused on creating wideband phased arrays that allowed multiple functions to share common hardware with frequency- and/or time-division duplexing schemes [8], [9], [10]. Following those efforts, a summary of the key requirements and design tradeoffs for various defense-focused radar, EW, and communications modes was presented in [11]. To help visualize this concept, Figure 1(a) illustrates a defense scenario where a multifunction system enables a fighter aircraft to communicate with friendly aircraft and ships while simultaneously employing radar and jamming functions on enemy targets.
Multifunction IBFD phased-array scenarios, highlighting (a) a defense application where a fighter aircraft can simultaneously communicate, employ radar, and engage jamming or advanced electronic attack (EA) countermeasures and (b) a commercial application with a smart base station providing communications enhanced by object tracking.
Applications that employ radio-based sensing have exploded in not only the traditional defense space but also the civilian/commercial sector. As a result, researchers have recently started investigating ways to integrate sensing into existing communications systems that contend for the same spectral resources. This concept is referred to as integrated sensing and communication (ISAC) and represents the simultaneous hosting of both radar and wireless communications applications within the same device [12]. This is shown in Figure 1(b) for a smart base station that can communicate with users as well as sense their locations to improve their links. Cognitive radios also benefit from hosting multiple functions, namely, communications and spectrum sensing, to accomplish the goals of creating highly reliable communications and efficiently utilizing the radio spectrum [13], [14], often employing wideband receiver architectures for the sensing [15], [16].
All these multifunction examples represent a new paradigm that embraces the convergence of different applications, in contrast to their historical coexistence, where systems would treat one another as interference sources and designers worked to improve the tolerance to the others. A significant restriction of the aforementioned research is that these multifunction systems were forced to share their common hardware in a frequency- and/or time-duplexed manner, meaning that two functions could not access the same frequency band at the same time. This limitation forces users to prioritize one application over another, which could drastically impact the performance of combing several functions as compared to their individual metrics, and it generates questions surrounding the usefulness of combining the functions in the first place.
Why In-Band Full-Duplex?
This is where in-band full-duplex (IBFD) technology enters the picture: allowing systems to simultaneous transmit and receive on the same frequency as well as adjacent channels without the need for guard bands or times [17], [18]. IBFD helps overcome the obstacles that result from multiple functions attempting to access the same spectral and hardware resources by allowing for the reception of signals (i.e., radar returns) while simultaneously transmitting (i.e., for communications). This technology, however, introduces its own challenges, namely, figuring out how to suppress the self-interference (SI) that results from transmitting and receiving within the same frequency band at the same time [19]. Unfortunately, there is not a universal solution to overcome the SI in IBFD systems, and instead, a combination of cancellation techniques that depend on the specific application and environment is required [20].
Despite this hurdle, IBFD has been shown to enhance the multifunction capabilities for each of the previously mentioned use cases. For defense applications, IBFD radios have combined tactical communications with different same-frequency EW scenarios [21], and a counter-improvised explosive device system with IBFD benefited from the ability to simultaneously detect and jam trigger signals [22]. IBFD operation has been shown to increase the throughput and reduce collisions in cognitive radio networks by providing a continual sensing ability [23], and it has been demonstrated to be a key enabler to decoupling the timing requirements for ISAC systems at 2.4- and 28-GHz frequencies [24].
Building on these successes, IBFD phased arrays are now beginning to be investigated to enhance the flexibility of simultaneous-multifunction systems for the applications previously discussed [25]. This article continues by describing the array fundamentals that motivate some of the critical design choices and then reviews the various IBFD array architectures. The prominent array configurations are then examined in more detail, including a dissection of the different SI cancellation (SIC) methods that effectively enable the incorporation of the other modalities. Finally, a survey of measured prototypes along with results and challenges are discussed before sharing some thoughts on the key aspects that influence the scalability of IBFD arrays such that solutions can be tailored to support simultaneous-multifunction systems for different applications.
Arrays and Full Duplex
Antenna Arrays
For
background, an antenna array is simply a group of antenna elements that
are operated together for wireless transmission and/or reception. Array
designers can select an element type with either an omnidirectional or
directional pattern as well as the spacing between the elements, both of
which influence the overall radiation characteristics. This results
from the combination of the element pattern and the array factor and
effectively enhances the directivity of the individual elements
regardless of their native directionality. For example, the azimuthal
radiation pattern of a four-element dipole array is given in Figure 2(a) and compares different element spacings, d. Starting with the
Phased-array comparisons with elements spaced by a distance, d, for a four-element dipole linear array radiation pattern versus the azimuth angle in (a) rectangular and (b) polar coordinates and a four-element linear patch array radiation pattern versus the azimuth angle in (c) rectangular and (d) polar coordinates.
Figure 2(a) and (b) also illustrates the introduction of “grating lobes” at ±45 and ±135° when the element spacing is
Similar to the dipole array, Figure 2(c) and (d) plots the directivity of a four-element linear patch array with different element spacings, d. For the
Full-Duplex Arrays
When thinking how to possibly incorporate the ability to simultaneously transmit and receive into a directional array (for multifunction or normal operation), several different options can be considered. The arrays within each architecture are constructed and configured differently, which presents unique challenges and opportunities for SIC. As demonstrated in Figure 3, the options consist of multiarray, aperture-level, and element-level designs (where each square represents a directional element, i.e., patch).
IBFD phased-array architectures highlighting the different transmit and receive elements for (a) multiaperture, (b) aperture-level, and (c) element-level designs.
Multiarray designs utilize two distinct antenna arrays for transmit and receive, which are physically separated from each other by some distance, as in Figure 3(a). Similar to nonarray systems with separate antennas, this configuration reduces the direct path coupling through the physical separation of the arrays, which provides isolation in a very straightforward manner [26]. Unlike nonarray systems, however, these arrays offer the added flexibility of incorporating adaptive beamforming with degrees of freedom that do not exist in systems with only single-element antennas. Unfortunately, the necessity of two unique arrays that are spatially separated requires a large physical volume to implement. This effectively limits this particular array architecture to larger platforms, and the design may not be suitable for many space-constrained applications.
This size disadvantage is eliminated for both the aperture- and element-level cases that utilize the same array for transmit and receive. Aperture-level arrays operate by electronically dividing the array into distinct zones, or subarrays, where some elements are assigned for transmit and the others for receive. This concept is depicted in Figure 3(b) for an example 8 × 8 configuration that nominally splits the array down the middle, forming two 8 × 4 subarrays. This architecture enables IBFD operation between the subarrays by creating high amounts of SIC through a combination of adaptive digital beamforming and cancellation techniques, as discussed in the next section. The most significant benefit of this approach is that the subarrays can be dynamically reconfigured between transmit and receive based on the data received and/or the demands of the application, such as scheduling different applications in a multifunction scenario. Additionally, this architecture does not require any RF/analog cancellation stages [27], which not only helps eliminate a potential bandwidth and/or linearity bottleneck but also removes any associated insertion loss penalties on both transmit and receive. While these benefits are significant, the downside of splitting the aperture into different subarrays is that the antenna array gain is reduced for both transmit and receive.
This array gain reduction is avoided for element-level designs that enable every element in the array to simultaneously transmit and receive, as in Figure 3(c). This is accomplished by including an antenna interface behind each individual element as well as introducing additional techniques to improve the transmit–receive (T/R) isolation within each element [28]. These designs also often incorporate analog cancellation stages that not only mitigate the SI at each element but also reduce the mutual coupling, or crosstalk interference (XI), that is generated from neighboring elements in the array. While this architecture enables maximum usage and flexibility of the aperture, the required RF/analog cancellation is not straightforward for arrays with an appreciable number of elements, and additionally, it introduces nontrivial insertion loss that impacts the transmit output power and receive noise figure, as discussed in a subsequent section dedicated to element-level designs [29].
Aperture-Level IBFD Arrays
Array Architecture
Behind each of the elements in Figure 3(b) reside transmit and receive channels with electronics that enable the arbitrary T/R subarray divisions. There are several different methods of constructing these hardware channels, where selections are often dictated by the operational frequency of the array. For lower-frequency applications (i.e., sub-6 GHz), arrays can be designed to directly generate and sample the RF signals with high-speed digital-to-analog converters (DACs) and analog-to-digital converters (ADCs). While this might complicate the digital design, the main benefit of this approach is that the RF/analog frequency conversion mixer stages are eliminated, which improves the dynamic range of the system by minimizing the creation of local oscillator and nonlinear spurious signals [30].
With this direct sampling concept in mind, Figure 4 is the block diagram of an example array with two transmit (left) and two receive (right) channels. Starting with the single transmit channel on the far left, a DAC is shown to generate a transmit signal that is subsequently filtered to remove the unwanted images and clock frequencies before being amplified by a power amplifier (PA) that is connected to a T/R switch and an antenna element within the array. On the other side of that T/R switch are the receiver electronics, which contain a slight modification to the front end as compared to a traditional array without IBFD. This change is the incorporation of an additional switch that is shown between the T/R switch and the low-noise amplifier (LNA). This switch allows the otherwise inactive receive channels that are connected to the active transmit channels to sample the transmit output through the use of a coupler, or similar device, as shown. The reason for this is expanded upon in the following section.
An IBFD aperture-level phased-array architecture highlighting adaptive transmit and receive digital beamforming as well as reference-based digital cancellation using observation feedback signals for SIC processing. Tx: transmitter; Rx: receiver; PA: power amplifier; LNA: low-noise amplifier.
The
top of the image shows the desired transmitted output as well as the
unwanted SI that couples between the transmit and receive elements of
the array. As previously discussed, the elements are spaced at
Digitally Enabled SIC Processes
The aperture-level array concept in Figure 3(b) generates SIC between subarrays within the aperture by using a collection of adaptive digital beamforming and cancellation techniques, as previously mentioned [31], [32]. While the connection of these methods is highlighted in the block diagram of Figure 4, their operation and effect on the signals within the array are discussed here. Figure 5 plots the relative power levels at various points in the transmit and receive channels of the array to illustrate how the signals change during each processing state. Three important power levels are denoted as the receiver noise floor, the receiver saturation level, and the transmit output power.
A
representative power plot showing how the transmit signal, noise, and
nonlinearities change for each of the processing stages within an IBFD
aperture-level phased array: 
transmitter input, 
transmitter output (uniform transmitter beamforming), 
receiver input (uniform transmitter beamforming), 
receiver input (adaptive transmitter beamforming), 
receiver output (adaptive receiver beamforming), and 
receiver output (reference-based digital cancellation).
Starting on the left, the first part represents a notional transmit signal that is output from a DAC. For illustrative purposes, the signal is simply two tones without any distortions imparted by the DAC other than a noise level that is imposed by its limited dynamic range, as shown. Assuming a uniform transmit beamformer that weights all the channels equally (i.e., effectively not providing any beamforming), the second part represents the transmit output signals that, in addition to the two tones and noise level, now also contain intermodulation distortion that results from the nonlinearities of the transmit channel, which are dominated by those of the PA. It should be noted that more complex waveforms (other than tones) produce nonlinearities that are at the same frequencies as the desired transmit signals and cannot be removed via conventional filtering, as the image might suggest.
The following parts of Figure 5 display the power levels through the receive channels. The third part depicts the coupled SI that is suppressed by the inherent path loss and directivity of the array at the input of the receivers (still with a uniform transmit beamformer). The main SI components are seen to be above the receiver saturation level and could also be above the maximum input, or damage level, for cases when the transmit output power is significantly high. The receive input is also shown to be above the receive noise floor and substantially below the coupled SI.
The first SIC stage is represented in the fourth step, which is the application of digital beamforming on the transmit side, where the signal common to each transmit channel (i.e., the two tones) is suppressed in the direction of the receiver elements. This near-field nulling effect can be accomplished with minimal impact to the far-field gain pattern when constraints are applied to the adaptive weight calculation and has been demonstrated for both omnidirectional [33], [34], [35] and directional arrays [36]. Due to the fact that the transmit nonlinearities and noise are unique to each transmit channel (and PA), they do not coherently subtract at the receiver elements, with the nonlinearities and noise level not changing for this processing stage, as indicated in Figure 5. Overall, the goal of this transmit beamforming task is to reduce the high-power transmit signal below the saturation level of the receiver channels so that it can be processed linearly and digitized.
The fifth part of the cascade illustrates the effect of the second SIC method that utilizes the digitized receive samples to provide adaptive beamforming on receive. In a similar way to the transmit beamforming, the receive channels are digitally weighted to create a near-field nulling effect that suppresses the coupling of both the transmit signal and uncorrelated noise, as was shown for omnidirectional [37] and directional IBFD systems [29], [38]. Since this technique treats both of these components as coming from the same spatial direction in the near field, both of the components’ receive power levels are reduced. It should be noted that receive beamforming algorithms can simultaneously attempt to mitigate SI in the near field and suppress traditional external interference in the far field, where the computations are limited by the degrees of freedom of the array, which is one less than the number of elements [39], [40].
The final step, captured in part six of Figure 5, is the application of referenced-based digital cancellation using the otherwise inactive receivers paired with each transmit channel to provide an observation of the actual signals that are transmitted [41], [42]. These signals differ from the ideal transmitted waveforms in that they additionally include the nonlinear components and nondeterministic noise generated, as visualized in the difference between parts one and two of the figure. The linear combination of the feedback from these reference receivers is used to feed a multichannel digital canceler that allows not only the transmit signal to be subtracted from the received data but also the transmitter nonlinearities and noise, since they were measured. This combination of techniques provides the aperture-level IBFD array system the ability to suppress the transmit signal, nonlinearities, and noise below the receiver noise floor and to recover the signal of interest, as shown in the last step.
Element-Level IBFD Arrays
Array Architectures
As shown in Figure 3(c), element-level IBFD arrays differ from aperture-level designs by allowing every element within the array to simultaneously transmit and receive. While researchers pursuing the aperture-level concept have predominately utilized architectures similar to Figure 4, element-level approaches have varied. This is due to the fact that multiple SIC techniques are available within the RF/analog domain to generate the necessary isolation between the transmit and receive channels for a given element.
Figure 6(a) presents a block diagram of an element-level IBFD array architecture that was demonstrated in [43]. Beginning at the top, each of the N
antenna elements are shown to produce SI that is appropriately indexed.
In addition to this SI, XI is generated between pairs of elements, such
that an XI coupling path exists from each element to every other
element in the array, for a total of
IBFD element-level phased-array architectures highlighting (a) an approach that utilizes RF/analog cancelers and (b) an approach that employs impedance tuning and RF/analog beamforming before a final nonlinear digital cancellation step.
Another requirement of element-level arrays is the inclusion of an antenna sharing interference, which is fulfilled by the circulator and connects the transmit and receive channels with the antenna for each element. Below these devices are RF/analog cancellation stages, consisting of tapped delay line structures that can independently adjust their complex weights in an attempt to mitigate the various types of interference [27]. The cancelers on top (in red) sample the transmit output for their corresponding element and focus on reducing the associated SI, while the cancelers below them (in blue) sample the other transmit channels in order to tackle the XI signals. The complexity of the canceler designs varies with signal power and delay spread, where 12 taps were utilized for the SI cancelers, four taps for the shorter XI paths (i.e., XI2 − 1), and two taps for the longer XI paths (i.e., XIN−1), for a total of 56 taps for the three-element array in [43]. These RF/analog cancellation stages reduce both the SI and XI so that they can be linearly processed and digitized by the receivers before the application of nonlinear digital cancellation (where the amplification, filtering, and frequency conversion components were omitted from the diagram to focus on the IBFD aspects).
An alternative element-level IBFD array architecture that avoids the use of RF/analog cancelers appears in Figure 6(b) [29]. The same SI and XI coupling paths are indicated at the top of the diagram for an array with N elements. While this approach also utilizes circulators, it employs an impedance tuner (in red) between them and the antenna elements. This device helps to dynamically match the impedances of the circulators and antennas such that reflections from the antennas are minimized and the T/R isolation is enhanced. Following the SIC provided by the tuners/circulators, this architecture leverages adaptive beamforming in the RF/analog domain to provide additional interference suppression. Jointly optimizing transmit and receive beamformers using analog components (such as the tunable gain stages and phase shifters shown) allows this design to maximize far-field gain and minimize near-field interference, similar to the aperture-level approach. It should be noted that the SI and XI signals are suppressed by summing the receive channels with a combiner (in blue), which reduces the interference before the ADC, as shown (where the ancillary RF/analog components were again omitted). After digitization, a nonlinear digital cancellation stage reduces the residual interference.
Front-End SIC Circuits
While aperture-level IBFD arrays leverage digitally enabled SIC processes, their element-level counterparts are enhanced by novel front-end circuits that provide isolation for each element, and several examples are discussed here. When the T/R isolation of these front ends is improved, the number of taps can be reduced for the architecture highlighted in Figure 6(a). Similarly, when the insertion loss is decreased, the transmit output power and receive noise figure can be improved for the approach examined in Figure 6(b). Common to these two architectures, and as previously mentioned, a circulator is essential to enable the use of the same antenna as well as provide isolation between the PA and LNA, depending on bandwidth and load requirements.
Standard circulators use the nonreciprocity provided by ferrites biased by dc magnetic fields from permanent magnets and thus are not amenable to monolithic integration. The nonreciprocal behavior of transistors can be used to achieve circulation and was first presented in 1965 [44]. In transistor-based devices, the distinction is made between active three-way circulators with full rotational symmetry (as in a ferrite device) and quasi circulators that have isolation between two of the ports but do not have full circulation. Different topologies of active monolithic microwave integrated circuit (MMIC) circulators and quasi circulators with the use of quadrature hybrids have been demonstrated in [45] and [46]. Noise performance and power limitation analysis as well as design techniques for simultaneous optimization are described in [47]. In addition, integration with antennas is discussed in [48] and [49], and a more recent review is presented in [50].
In [51], a MMIC implementation using Qorvo’s 0.25-µm
gallium arsenide (GaAs) pseudomorphic high-electron mobility transistor
process and designed to operate at the 7–13-GHz band was demonstrated (Figure 7).
Circulation is accomplished by connecting three unconditionally stable,
gain-matched, single-stage equal amplifiers with three asymmetric Lange
couplers. The through ports are connected to the amplifier inputs, and
the coupled ports are connected to the outputs. The isolated ports are
terminated in 50-Ω resistors, and the Lange coupling coefficient is
specified to achieve a tradeoff between backward isolation
![Figure 7. - (a) A broadband 7–13-GHz active circulator topology. (b) An active circulator GaAs MMIC circuit. When port 1 (P1) is the input, P2 is the output, and P3 is isolated. (c) Simulated and measured results for 50-Ω loads at all ports from 6 to 14 GHz, showing insertion gain of up to 2.4 dB, with isolation |S31| greater than 13 dB across the band [51].](https://ieeexplore.ieee.org/mediastore_new/IEEE/content/media/6668/10460204/10460255/kolodziej07-3351978-large.gif)
(a) A broadband 7–13-GHz active circulator topology. (b) An active circulator GaAs MMIC circuit. When port 1 (P1) is the input, P2 is the output, and P3 is isolated. (c) Simulated and measured results for 50-Ω loads at all ports from 6 to 14 GHz, showing insertion gain of up to 2.4 dB, with isolation |S31| greater than 13 dB across the band [51].
![Figure 8. - (a) An active circulator ring topology with three-stage traveling-wave amplifiers in each branch. (b) A 2.8 × 1.6-mm active circulator MMIC. (c) The measured performance from 50 to 110 GHz [72].](https://ieeexplore.ieee.org/mediastore_new/IEEE/content/media/6668/10460204/10460255/kolodziej08-3351978-large.gif)
(a) An active circulator ring topology with three-stage traveling-wave amplifiers in each branch. (b) A 2.8 × 1.6-mm active circulator MMIC. (c) The measured performance from 50 to 110 GHz [72].
For applications that must suppress external interference in addition to SI and XI, reconfigurable filters that contain multiple bandpass and band stop sections offer significant flexibility benefits over conventional tunable filters, which are generally quite lossy, require a large volume, and have many tunable elements. In contrast, a solution with gain that combines an isolation component with a tunable spectrum notch that can be placed over the largest interferer to reduce the dynamic range requirements on the ADC and allow the reception of a weak signal is displayed in Figure 9. The solution is well suited for MMIC integration that can be cointegrated with the front-end SIC circuits and phased-array architectures previously discussed.
![Figure 9. - (a) An active broadband interference cancellation MMIC. (b) A fabricated GaAs MMIC. (c) The measured amplitude of the transmission and reflection coefficients with variation of the control voltage on the variable-delay artificial transmission line. The drain bias on both paths is 2 V, and the gate bias on the upper and lower paths is 0.8 and 1 V, respectively. As the control voltage increases from –0.7 to 0.7 V, the notch created by the destructive interference moves down in frequency from 10.8 to 8.2 GHz, as shown by the arrow [53].](https://ieeexplore.ieee.org/mediastore_new/IEEE/content/media/6668/10460204/10460255/kolodziej09-3351978-large.gif)
(a) An active broadband interference cancellation MMIC. (b) A fabricated GaAs MMIC. (c) The measured amplitude of the transmission and reflection coefficients with variation of the control voltage on the variable-delay artificial transmission line. The drain bias on both paths is 2 V, and the gate bias on the upper and lower paths is 0.8 and 1 V, respectively. As the control voltage increases from –0.7 to 0.7 V, the notch created by the destructive interference moves down in frequency from 10.8 to 8.2 GHz, as shown by the arrow [53].
The design of an initial demonstration is exhibited in Figure 9, which operates in the 6–12-GHz band and is implemented in a GaAs MMIC process, where the details and characterization are discussed in [53] and [54]. The tunable active notch filter in Figure 9(a) implements a multitap analog finite-impulse response filter (i.e., canceler) with active components to create gain and a low overall noise figure. The chip prototype is in Figure 9(b), where the main path (top) does not include extra delays. In contrast, the cancellation path (bottom) contains a variable delay line and a variable gain amplifier (VGA). The VGA is adjusted so that the main and cancellation path gains are equal, so the direct and delayed signals cancel each other perfectly at a frequency within the band. When the variable delay is tuned, the notch frequency is adjusted between 6 and 12 GHz [Figure 9(c)]. The VGA is set to zero gain if no notch is desired, and the cancellation path becomes inactive.
IBFD Array Prototypes
Measurement Survey
Due to the number of channels required and their associated hardware costs, phased-array systems are expensive to create. With that said, several universities and research organizations have constructed IBFD array prototypes as well as simulated various aspects of their design and performance.
Table 1 categorizes measured prototypes based on their IBFD architectural type and compares the number of antenna elements and their arrangement, operational frequency, bandwidth, and transmit output power per element as well as the reported total isolation achieved. It is evident that many researchers have chosen to focus on designs revolving around the aperture-level architecture as opposed to element-level approaches. The array sizes are seen to vary from three up to 72 elements and have arrangement types that include both one (linear) and two dimensions (square and rectangular). The design frequencies range from 0.73 to 10 GHz, with instantaneous bandwidths spanning 1 to 200 MHz. While not every publication reported the element transmit output power, the maximum was found to be +33 dBm, or 2 W.
The total isolation achieved by these systems is seen to vary over a wide range and is influenced by the output power level and bandwidth, where the highest isolation was reported as 160.8 dB for a narrow-band measurement of a high-power prototype. For a more visual representation of this data, Figure 10 outlines the total isolation reported versus the total number of array elements and distinguishes between the aperture- and element-level architectures. Ideally, this comparison table would also include numbers on power consumption per element and system losses due to implementing IBFD operation; however, these metrics were not reported in the research publications.
The total isolation versus the total number of array elements for measured IBFD phased-array systems with aperture- and element-level architectures.
Regarding the simulation contributions, Table 2 summarizes IBFD array publications that have modeled various aspects of the different architectures and element arrangements. It shows that element counts up to 100 have been considered for arrays with operating frequencies up to 28 GHz. This table also lists the main focus and simulation contributions of each paper to provide readers with a quick summary to pique their interest for further investigation. While many have focused on different facets of SIC, other topics have included the analysis of beamformer losses, optimization algorithms, and data rate gains for these systems. While both of these tables highlight the fact that aperture-level architectures have dominated the focus of research to date, overall knowledge of IBFD arrays is limited and continuing to progress.
Results and Challenges
To provide more insight into the designs highlighted in Table 1, the results and challenges of the highest-performing systems are discussed here for both aperture- and element-level architectures. Specifically, the SIC and XI cancellation (XIC), or total isolation, performance is analyzed for the different mitigation strategies, and associated system losses are examined.
Beginning with the aperture-level IBFD array presented in [38] and [55], with the architecture depicted in Figure 4, an example of the SIC performance over a 100-MHz bandwidth centered at 2.45 GHz can be seen in the power spectral density (PSD) plot of Figure 11(a). This measurement was conducted using an eight-element linear array in an anechoic chamber and allowed the beamforming and cancellation techniques to be evaluated without any multipath effects. The effective isotropic radiated power (EIRP) for the array was 44.8 dBm, which was the result of combining the array gain of 11.5 dBi and 33.3 dBm of total output power with uniform transmit beamforming. Adapting the transmit weights with the objective of reducing the coupling power as well as not sacrificing the main transmit beam performance resulted in reducing the SI at the receive elements to less than –22 dBm. Adaptive receive beamforming further lowered the interference to –46.3 dBm while also removing some of the transmit noise, as visualized in the smoothness of the residual signal. The reference-based digital cancellation process then decreased the residual to –96.1 dBm, which was 2.5 dB above the noise floor, and yielded a total of 140.5 dB of T/R isolation.
![Figure 11. - Aperture-level IBFD array performance, showing the PSD with various SIC techniques, including adaptive transmitter and receiver beamforming and digital cancellation, over (a) 100-MHz and (b) 1-MHz bandwidths (from [55]). EIRP: effective isotropic radiated power.](https://ieeexplore.ieee.org/mediastore_new/IEEE/content/media/6668/10460204/10460255/kolodziej11-3351978-large.gif)
Aperture-level IBFD array performance, showing the PSD with various SIC techniques, including adaptive transmitter and receiver beamforming and digital cancellation, over (a) 100-MHz and (b) 1-MHz bandwidths (from [55]). EIRP: effective isotropic radiated power.
These same processes were repeated for a signal with a 1-MHz bandwidth, as represented in the measured results of Figure 11(b). This plot demonstrates a similar EIRP (44.5 dBm) and SI decrease near the noise floor (2.2 dB above), for a total isolation of 160.8 dB, which signifies that this approach scales with signal bandwidth and corresponding noise floor changes.
While this aperture-level architecture was demonstrated to offer a fairly straightforward path to high output power and near-optimal SI reduction, there are two distinct challenges to overcome before widespread adoption. The first relates to the front-end hardware modification of traditional arrays that allows for the transmit output signals to be sampled and fed into the reference-based digital canceler. This unique set of switches and couplers should have a high dynamic range, provide the ability to operate over different output powers, and exhibit low loss such that the losses after the PAs and system noise figure are comparable to arrays with standard T/R switches. Initial research targeting this problem using GaN-based MMICs at both the S-band and X band shows promising results [56]. The second challenge relates to the beamforming algorithms and the need to simultaneously satisfy the goals of minimally impacting the far-field gain while also providing near-field SIC. While the prototype presented in [38] and [55] successfully demonstrated SIC with far-field main beam transmit/receive gain reductions of less than 0.5 dB as a result of the beamforming operations, the algorithm did not run in real time. This can potentially be improved by incorporating neural networks that can be implemented on field-programmable gate arrays (FPGAs) but still needs to be proved as the array size increases [57].
The first element-level architecture, demonstrated in [43] and detailed in Figure 6(a), reported SI and XI reductions over a 20-MHz bandwidth centered at 2.45 GHz, as shown in Figure 12(a). The circulator isolation and SIC provide 30 dB of suppression, which reduces the +20-dBm transmit output power to –10 dBm. The XI signal levels are then decreased by 40 dB by using their corresponding cancelers, which lowers the total interference power to –50 dBm. The remaining signal is then sampled and further suppressed by an additional 33 dB using digital cancellation, bringing the residual to –83 dBm, which is 1.6 dB above the receiver noise floor. With 70 dB of RF/analog cancellation, this three-element prototype produced 103 dB of total isolation.
![Figure 12. - Element-level IBFD array performance, showing (a) the PSD with various SIC and XIC techniques and digital cancellation over a 20-MHz bandwidth (from [43]) and (b) analog SIC performance for adaptive analog transmitter and receiver beamforming and antenna impedance tuning, compared to the native isolation of a single element (from [29]).](https://ieeexplore.ieee.org/mediastore_new/IEEE/content/media/6668/10460204/10460255/kolodziej12-3351978-large.gif)
Element-level IBFD array performance, showing (a) the PSD with various SIC and XIC techniques and digital cancellation over a 20-MHz bandwidth (from [43]) and (b) analog SIC performance for adaptive analog transmitter and receiver beamforming and antenna impedance tuning, compared to the native isolation of a single element (from [29]).
The second element-level design, presented in [29] and described in Figure 6(b), reported RF/analog domain SIC over a 16.25-MHz bandwidth centered at 730 MHz, as shown in Figure 12(b). The nominal T/R isolation for a single element was measured to be roughly 15 dB, where the addition of the adaptive transmit and receive analog beamforming increased the SIC to 40.7 dB. For the beamforming algorithm, the far-field array gains for both transmit and receive were permitted to degrade by 3 dB. Simultaneously optimizing the beamforming weights and the antenna impedance tuners provided a total RF/analog SIC of 50 dB. This was later combined with another 50 dB of SIC by using digital cancellation and yielded a total isolation of 100 dB for the 2 × 4-element array.
While not strictly phased arrays in the sense that we have discussed (since they do not maintain a traditional
Similar to these MIMO systems, both of the element-level designs face hardware-related challenges, with the former approach needing to tackle how to efficiently incorporate and tune all the RF/analog canceler taps within each element and the latter being limited to a single receive beam due to the analog combination scheme feeding a single ADC. Additionally, each architecture must contend with high-speed RF signal routing between the elements to accomplish its intended SIC: the first needs to route the necessary canceler inputs, while the second must route the receive signals into the combiner. This physical routing obstacle can more broadly be categorized as a scaling challenge, which is also common to aperture-level designs and additionally pushes into the digital computing realm, as all these IBFD arrays utilize digital SIC processing as the final mitigation step. The following section outlines some future research directions that can be pursued to help overcome these scalability challenges.
Future Scalability
The scalability of IBFD phased arrays can be broken down into two major categories: the physical array panels themselves and the digital signal processing on them. This section discusses these two aspects in more detail and shares some thoughts on potential implementation strategies.
Physical Panels
Many of the prototypes listed in Table 1
were designed with a modest number of antenna elements and could not
easily cascade additional elements and hardware channels to change the
array size beyond their initial proof of concept. This can be
accomplished by focusing on the unit cell design within the antenna,
where Figure 13(a) gives an example array with patch elements arranged in a square 2D fashion [60].
While other element types could be used, this patch-based approach
provides an area for the RF/analog electronics (i.e., cancelers) to be
integrated with the back side area, which is defined with the desired
A construction concept of an IBFD phased-array panel that can be scaled both horizontally and vertically, showing (a) the front view and (b) an exploded view with subsystem labels. PCB: printed circuit board; EMI: electromagnetic interference.
Figure 13(b) describes a nominal configuration for the internal construction of the scalable panel in an exploded view. Beginning on the right, an aperture printed circuit board (PCB) assembly is seen with 64 dual-polarized patch elements on the front face, which allows the design to support polarimetric operation that benefits several sensing applications. This board also offers the ability to embed RF/analog signal routing within close proximity to the antennas on high-isolation stripline layers, which can help overcome the key signal routing challenge of the element-level IBFD array architectures [63]. Following the aperture PCB, an electromagnetic interference shielding gasket can be inserted to minimize the unwanted coupling between the T/R channels. Without this shielding, these coupling levels could limit the amount of achievable SIC since the hardware coupling might not be distinguished from the antenna SI coupling, effectively raising the receiver noise floor.
For designs with high transmit output power levels, an integrated cold plate with cooling liquid running through the vertical channels shown might be required to draw heat away from the PA parts with limited power-added efficiencies. On the other side of the cold plate, the backplane PCB assembly would be responsible for containing the remaining RF/analog components, data converters, and signal processors. Finally, a mechanical cover would protect the back of the panel and additionally provide access to data transfer ports as well as an input and output for the thermal management liquid. While other scalable panel designs can certainly be envisioned, this approach offers the ability to combine the necessary IBFD array hardware with integrated signal routing and data converters for onboard digital signal processing, as discussed next.
Digital Processing
While the scalability and performance of these arrays benefits from integrating the antennas, electronics, and signal routing within the same physical panel, it is also desirable to host a compact digital computing solution on the array itself. Not only does this allow the array to locally manage its resources for simultaneous-multifunction operation but it also provides the option to output actionable data products instead of raw data samples. One method of providing this digital signal processing capability is to utilize the RF system on chip (RFSoC) from Xilinx that combines up to 16 DACs and ADCs with the programmable logic (PL) of an FPGA and processing system (PS) that consists of ARM core processors. Figure 14(a) illustrates how a 2 × 4 section of the previously discussed 8 × 8 concept design can be connected to the T/R hardware and employ a highly integrated version of the 16-channel RFSoC [64]. With the nominal patch elements supporting both vertical and horizontal polarizations, the use of 16 channels is required to connect to both polarizations for the eight elements, as shown.
A scalable digital phased-array concept, highlighting (a) a 2 × 4 subarray with a single 16-channel RFSoC interfacing to eight dual-polarized patch antennas and (b) an 8 × 8 dual-polarized array panel created by combining eight subarrays with RFSoCs interconnected both on and off the panel.
For IBFD-focused arrays, the PL can perform the required SIC processing steps for either the aperture- or element-level architectures with minimal latency, computing the transmit and receive beamformer values and/or complex digital cancellation weights. The PS, on the other hand, consists of multiple CPU-based ARM core processors that can control the SIC processing on the PL and/or facilitate a user interface. For traditional arrays, these processing resources have been utilized to demonstrate adaptive digital beamforming for a modular 8 × 8 S-band array in [65] as well as channelize and beamform using two 16-channel RFSoCs for a modular 8 × 8 dual-polarized C-band design in [66]. Additionally, wideband sampling and true time delay beamforming were demonstrated for an S-band 8 × 1 array in [67], and sampling and synchronization across two eight-channel RFSoCs were accomplished with a module 16 × 1 C-band system in [68].
While Figure 14(a) focuses on the connections within a 2 × 4 piece of the array, Figure 14(b) shows how eight of these blocks could be tiled to construct a full 8 × 8 panel, which represents a higher level of integration compared to previous approaches. The figure highlights how eight RFSoC modules are required to cover all 64 dual-polarized elements and are interconnected within the digital backplane. Additionally, each part provides at least one off-panel connection, which allows data to be shared among multiple panels and is critical to aid in the scalability of the concept design. This seamless digital data sharing is critical for scalable SIC approaches that separate the time-invariant and time-variant interference components to reduce the computational complexity as the array size grows to support multiple functions and deployment scenarios [69]. While this discussion focuses on RFSoC-based approaches, other multichannel array processing architectures could be considered, including custom low-power digital sampling and beamforming chips, among others [70], [71].
Conclusions
Phased-array systems are being incorporated into devices that support wireless communications for both ground- and satellite-based links, commercial and defense radar, and military EW strategies, among others. Recent research has focused on the intersection of these different applications and their contention for the same spectral and hardware resources. The creation of simultaneous-multifunction wireless systems offers the opportunity to integrate traditionally “stovepiped” solutions and leverage one application to enhance the performance of another (i.e., smart base stations can use radar to track users and improve their communications links). One of the major challenges of integrating multiple functions is managing the competing need for applications to access the same frequency channels and time slots, which can be overcome by incorporating IBFD operation into the designs.
This article provided an overview of the state-of-the-art IBFD phased-array implementations that could be used to create simultaneous-multifunction systems. Various IBFD array architectures were presented, with a focus on aperture- and element-level approaches. The former divides the aperture into transmit and receive subarrays and utilizes digitally enabled SIC processes to create isolation between the subarrays. The latter allows the same antenna in each element to simultaneously transmit and receive and requires an RF/analog-based cancellation scheme to reduce interference before digitization and further suppression. A survey of measured IBFD array prototypes as well as their results and limitations were discussed, which highlighted the need for additional research on the physical and computational scalability of IBFD arrays before they are able to support future multifunction systems.
ACKNOWLEDGMENT
This material is based upon work supported by the undersecretary of defense for research and engineering, under Air Force Contract FA8702-15-D-0001. Any opinions, findings, conclusions, or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the undersecretary of defense for research and engineering.
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